790
| Part number | Units | Description | Datasheet |
|---|---|---|---|
| 7400 | 4 | quad 2-input NAND gate | HC/HCT |
| 741G00 | 1 | single 2-input NAND gate | HC/HCT |
| 7401 | 4 | quad 2-input NAND gate with open collector outputs | LS |
| 741G01 | 1 | single 2-input NAND gate with open drain output | |
| 7402 | 4 | quad 2-input NOR gate | HC/HCT |
| 741G02 | 1 | single 2-input NOR gate | |
| 7403 | 4 | quad 2-input NAND gate with open collector outputs | HC/HCT |
| 741G03 | 1 | single 2-input NAND gate with open drain output | |
| 7404 | 6 | hex inverter | HC/HCT |
| 741G04 | 1 | single inverter | |
| 7405 | 6 | hex inverter with open collector outputs | HC |
| 741G05 | 1 | single inverter with open drain output | |
| 7406 | 6 | hex inverter buffer/driver with 30 V open collector outputs | |
| 741G06 | 1 | single inverting buffer/driver with open drain output | |
| 7407 | 6 | hex buffer/driver with 30 V open collector outputs | |
| 741G07 | 1 | single non-inverting buffer/driver | |
| 7408 | 4 | quad 2-input AND gate | HC/HCT |
| 741G08 | 1 | single 2-input AND gate | |
| 7409 | 4 | quad 2-input AND gate with open collector outputs | |
| 741G09 | 1 | single 2-input AND gate with open drain output | |
| 7410 | 3 | triple 3-input NAND gate | HC/HCT |
| 7411 | 3 | triple 3-input AND gate | HC/HCT |
| 7412 | 3 | triple 3-input NAND gate with open collector outputs | |
| 7413 | 2 | dual Schmitt trigger 4-input NAND gate | |
| 7414 | 6 | hex Schmitt trigger inverter | HC/HCT |
| 741G14 | 1 | single Schmitt trigger inverter | |
| 7415 | 3 | triple 3-input AND gate with open collector outputs | |
| 7416 | 6 | hex inverter buffer/driver with 15 V open collector outputs | |
| 7417 | 6 | hex buffer/driver with 15 V open collector outputs | |
| 741G17 | 1 | single Schmitt-trigger buffer | |
| 7418 | 2 | dual 4-input NAND gate with Schmitt trigger inputs | |
| 7419 | 6 | hex Schmitt trigger inverter | |
| 7420 | 2 | dual 4-input NAND gate | HC/HCT |
| 7421 | 2 | dual 4-input AND gate | HC |
| 7422 | 2 | dual 4-input NAND gate with open collector outputs | |
| 7423 | 2 | expandable dual 4-input NOR gate with strobe | |
| 7424 | 4 | quad 2-input NAND gate gates with Schmitt trigger line-receiver inputs. | |
| 7425 | 2 | dual 4-input NOR gate | |
| 7426 | 4 | quad 2-input NAND gate with 15 V open collector outputs | |
| 7427 | 3 | triple 3-input NOR gate | HC/HCT |
| 741G27 | 1 | single 3-input NOR gate | |
| 7428 | 4 | quad 2-input NOR buffer | |
| 7430 | 1 | 8-input NAND gate | HC/HCT |
| 7431 | 6 | hex delay elements | |
| 7432 | 4 | quad 2-input OR gate | HC/HCT |
| 741G32 | 1 | single 2-input OR gate | |
| 7433 | 4 | quad 2-input NOR buffer with open collector outputs | |
| 7434 | 6 | hex noninverters | HC |
| 7435 | 6 | hex noninverters with open-collector outputs | |
| 7436 | 4 | quad 2-input NOR gate (different pinout than 7402) | |
| 7437 | 4 | quad 2-input NAND buffer | |
| 7438 | 4 | quad 2-input NAND buffer with open collector outputs | |
| 7439 | 4 | quad 2-input NAND buffer with open collector outputs, input and output terminals flipped, otherwise functionally identical to 7438 | |
| 7440 | 2 | dual 4-input NAND buffer | |
| 7441 | 1 | BCD to decimal decoder/Nixie tube driver | |
| 7442 | 1 | BCD to decimal decoder | HC/HCT |
| 7443 | 1 | excess-3 to decimal decoder | |
| 7444 | 1 | excess-3-Gray code to decimal decoder | |
| 7445 | 1 | BCD to decimal decoder/driver | |
| 7446 | 1 | BCD to 7-segment display decoder/driver with 30 V open collector outputs | |
| 7447 | 1 | BCD to 7-segment decoder/driver with 15 V open collector outputs | |
| 7448 | 1 | BCD to 7-segment decoder/driver with internal pullups | |
| 7449 | 1 | BCD to 7-segment decoder/driver with open collector outputs | |
| 7450 | 2 | dual 2-wide 2-input AND-OR-invert gate (one gate expandable) | |
| 7451 | 2 | dual 2-wide 2-input AND-OR-invert gate | |
| 7452 | 1 | expandable 4-wide 2-input AND-OR gate | |
| 7453 | 1 | expandable 4-wide 2-input AND-OR-invert gate | |
| 7454 | 1 | 3-2-2-3-input AND-OR-invert gate | |
| 7455 | 1 | 2-wide 4-input AND-OR-invert gate (74H version is expandable) | |
| 7456 | 1 | 50:1 frequency divider | |
| 7457 | 1 | 60:1 frequency divider | |
| 7458 | 1 | 2-input & 3-input AND-OR gate | HC/HCT |
| 7459 | 1 | 2-input & 3-input AND-OR-invert gate | |
| 7460 | 2 | dual 4-input expander | |
| 7461 | 3 | triple 3-input expander | |
| 7462 | 1 | 3-2-2-3-input AND-OR expander | |
| 7463 | 6 | hex current sensing interface gates | |
| 7464 | 1 | 4-2-3-2-input AND-OR-invert gate | |
| 7465 | 1 | 4-2-3-2 input AND-OR-invert gate with open collector output | |
| 7468 | 2 | dual 4-bit decade counters | |
| 7469 | 2 | dual 4-bit binary counters | |
| 7470 | 1 | AND-gated positive edge triggered J-K flip-flop with asynchronous preset and clear | |
| 74H71 | 1 | AND-or-gated J-K master-slave flip-flop with preset | |
| 74L71 | 1 | AND-gated R-S master-slave flip-flop with preset and clear | |
| 7472 | 1 | AND gated J-K master-slave flip-flop with asynchronous preset and clear | |
| 7473 | 2 | dual J-K flip-flop with asynchronous clear | HC/HCT |
| 7474 | 2 | dual D positive edge triggered flip-flop with asynchronous preset and clear | HC/HCT |
| 7475 | 2 | 4-bit bistable latch | HC/HCT |
| 7476 | 2 | dual J-K flip-flop with preset and clear | |
| 7477 | 1 | 4-bit bistable latch | |
| 74H78 | 2 | dual positive pulse triggered J-K flip-flop with preset, common clock, and common clear | |
| 74L78 | 2 | dual positive pulse triggered J-K flip-flop with preset, common clock, and common clear | |
| 74LS78 | 2 | dual negative edge triggered J-K flip-flop with preset, common clock, and common clear | |
| 7479 | 2 | dual D flip-flop | |
| 741G79 | 1 | single D-type flip-flop positive edge trigger non-inverting output | |
| 7480 | 1 | gated full adder | |
| 741G80 | 1 | single D-type flip-flop positive edge trigger inverting output | |
| 7481 | 1 | 16-bit random access memory | |
| 7482 | 1 | 2-bit binary full adder | |
| 7483 | 1 | 4-bit binary full adder | |
| 7484 | 1 | 16-bit random access memory | |
| 7485 | 1 | 4-bit magnitude comparator | HC/HCT |
| 7486 | 4 | quad 2-input XOR gate | HC/HCT |
| 741G86 | 1 | single 2-input exclusive-OR gate | |
| 7487 | 1 | 4-bit true/complement/zero/one element | |
| 7488 | 1 | 256-bit read-only memory | |
| 7489 | 1 | 64-bit random access memory | |
| 7490 | 1 | decade counter (separate divide-by-2 and divide-by-5 sections) | |
| 7491 | 1 | 8-bit shift register, serial In, serial out, gated input | |
| 7492 | 1 | divide-by-12 counter (separate divide-by-2 and divide-by-6 sections) | |
| 7493 | 1 | 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) | HC/HCT |
| 7494 | 1 | 4-bit shift register, dual asynchronous presets | |
| 7495 | 1 | 4-bit shift register, parallel in, parallel out, serial input | |
| 7496 | 1 | 5-bit parallel-in/parallel-out shift register, asynchronous preset | |
| 7497 | 1 | synchronous 6-bit binary rate multiplier | |
| 741G97 | 1 | configurable multiple-function gate | |
| 7498 | 1 | 4-bit data selector/storage register | |
| 7499 | 1 | 4-bit bidirectional universal shift register | |
| 74100 | 2 | dual 4-bit bistable latch | |
| 74101 | 1 | AND-OR-gated J-K negative-edge-triggered flip-flop with preset | |
| 74102 | 1 | AND-gated J-K negative-edge-triggered flip-flop with preset and clear | |
| 74103 | 2 | dual J-K negative-edge-triggered flip-flop with clear | |
| 74104 | 1 | J-K master-slave flip-flop | |
| 74105 | 1 | J-K master-slave flip-flop | |
| 74106 | 2 | dual J-K negative-edge-triggered flip-flop with preset and clear | |
| 74107 | 2 | dual J-K flip-flop with clear | HC/HCT |
| 74107a | 2 | dual J-K negative-edge-triggered flip-flop with clear | |
| 74108 | 2 | dual J-K negative-edge-triggered flip-flop with preset, common clear, and common clock | |
| 74109 | 2 | dual J-Not-K positive-edge-triggered flip-flop with clear and preset | HC/HCT |
| 74110 | 1 | AND-gated J-K master-slave flip-flop with data lockout | |
| 74111 | 2 | dual J-K master-slave flip-flop with data lockout | |
| 74112 | 2 | dual J-K negative-edge-triggered flip-flop with clear and preset | HC/HCT |
| 74113 | 2 | dual J-K negative-edge-triggered flip-flop with preset | |
| 74114 | 2 | dual J-K negative-edge-triggered flip-flop with preset, common clock and clear | |
| 74116 | 2 | dual 4-bit latch with clear | |
| 74118 | 6 | hex set/reset latch | |
| 74119 | 6 | hex set/reset latch | |
| 74120 | 2 | dual pulse synchronizer/drivers | |
| 74121 | 1 | monostable multivibrator | |
| 74122 | 1 | retriggerable monostable multivibrator with clear | HC/HCT |
| 74123 | 2 | dual retriggerable monostable multivibrator with clear | HC/HCT |
| 741G123 | 1 | single retriggerable monostable multivibrator with clear | |
| 74124 | 2 | dual voltage-controlled oscillator | |
| 74125 | 4 | quad bus buffer with three-state outputs, negative enable | HC/HCT |
| 741G125 | 1 | buffer/line driver, three-state output with active low output enable | |
| 74126 | 4 | quad bus buffer with three-state outputs, positive enable | HC/HCT |
| 741G126 | 1 | buffer/line driver, three-state output with active high output enable | |
| 74128 | 4 | quad 2-input NOR line driver | |
| 74130 | 4 | quad 2-input AND gate buffer with 30 V open collector outputs | |
| 74131 | 4 | quad 2-input AND gate buffer with 15 V open collector outputs | |
| 74132 | 4 | quad 2-input NAND Schmitt trigger | HC/HCT |
| 74133 | 1 | 13-input NAND gate | |
| 74134 | 1 | 12-input NAND gate with three-state output | |
| 74135 | 4 | quad exclusive-or/NOR gate | |
| 74136 | 4 | quad 2-input XOR gate with open collector outputs | |
| 74137 | 1 | 3 to 8-line decoder/demultiplexer with address latch | HC |
| 74138 | 1 | 3 to 8-line decoder/demultiplexer | HC/HCT |
| 74139 | 2 | dual 2 to 4-line decoder/demultiplexer | HC/HCT |
| 74140 | 2 | dual 4-input NAND line driver | |
| 74141 | 1 | BCD to decimal decoder/driver for cold-cathode indicator/Nixie tube | |
| 74142 | 1 | decade counter/latch/decoder/driver for Nixie tubes | |
| 74143 | 1 | decade counter/latch/decoder/7-segment driver, 15 mA constant current | |
| 74144 | 1 | decade counter/latch/decoder/7-segment driver, 15 V open collector outputs | |
| 74145 | 1 | BCD to decimal decoder/driver | |
| 74147 | 1 | 10-line to 4-line priority encoder | HC/HCT |
| 74148 | 1 | 8-line to 3-line priority encoder | |
| 74150 | 1 | 16-line to 1-line data selector/multiplexer | |
| 74151 | 1 | 8-line to 1-line data selector/multiplexer | HC/HCT |
| 74152 | 1 | 8-line to 1-line data selector/multiplexer | |
| 74153 | 2 | dual 4-line to 1-line data selector/multiplexer | HC/HCT |
| 74154 | 1 | 4-line to 16-line decoder/demultiplexer | HC/HCT |
| 74155 | 2 | dual 2-line to 4-line decoder/demultiplexer | |
| 74156 | 2 | dual 2-line to 4-line decoder/demultiplexer with open collector outputs | |
| 74157 | 4 | quad 2-line to 1-line data selector/multiplexer, noninverting | HC/HCT |
| 74158 | 4 | quad 2-line to 1-line data selector/multiplexer, inverting | HC |
| 74159 | 1 | 4-line to 16-line decoder/demultiplexer with open collector outputs | |
| 74160 | 1 | synchronous 4-bit decade counter with asynchronous clear | HC/HCT |
| 74161 | 1 | synchronous 4-bit binary counter with asynchronous clear | HC/HCT |
| 74162 | 1 | synchronous 4-bit decade counter with synchronous clear | HC/HCT |
| 74163 | 1 | synchronous 4-bit binary counter with synchronous clear | HC/HCT |
| 74164 | 1 | 8-bit parallel-out serial shift register with asynchronous clear | HC/HCT |
| 74165 | 1 | 8-bit serial shift register, parallel load, complementary outputs | HC/HCT |
| 74166 | 1 | parallel-load 8-bit shift register | HC/HCT |
| 74167 | 1 | synchronous decade rate multiplier | |
| 74168 | 1 | synchronous 4-bit up/down decade counter | |
| 74169 | 1 | synchronous 4-bit up/down binary counter | |
| 74170 | 1 | 4 by 4 register file with open collector outputs | |
| 74171 | 4 | quad D-type flip-flops with clear | |
| 74172 | 1 | 16-bit multiple port register file with three-state outputs | |
| 74173 | 4 | quad D flip-flop with three-state outputs and asynchronous clear | HC/HCT |
| 74174 | 6 | hex D flip-flop with common asynchronous clear | HC/HCT |
| 74175 | 4 | quad D edge-triggered flip-flop with complementary outputs and asynchronous clear | HC/HCT |
| 74176 | 1 | presettable decade (bi-quinary) counter/latch | |
| 74177 | 1 | presettable binary counter/latch | |
| 74178 | 1 | 4-bit parallel-access shift register | |
| 74179 | 1 | 4-bit parallel-access shift register with asynchronous clear and complementary Qd outputs | |
| 74180 | 1 | 9-bit odd/even parity bit generator and checker | |
| 74181 | 1 | 4-bit arithmetic logic unit and function generator | LS |
| 74182 | 1 | lookahead carry generator | |
| 74183 | 2 | dual carry-save full adder | |
| 74184 | 1 | BCD to binary converter | |
| 74185 | 1 | 6-bit binary to BCD converter | |
| 74186 | 1 | 512-bit (64×8) read-only memory with open collector outputs | |
| 74187 | 1 | 1024-bit (256×4) read only memory with open collector outputs | |
| 74188 | 1 | 256-bit (32×8) programmable read-only memory with open collector outputs | |
| 74189 | 1 | 64-bit (16×4) RAM with inverting three-state outputs | F |
| 74190 | 1 | synchronous up/down decade counter | HC/HCT |
| 74191 | 1 | synchronous up/down binary counter | HC/HCT |
| 74192 | 1 | synchronous up/down decade counter with clear | HC/HCT |
| 74193 | 1 | synchronous up/down 4-bit binary counter with clear | HC/HCT |
| 74194 | 1 | 4-bit bidirectional universal shift register | HC/HCT |
| 74195 | 1 | 4-bit parallel-access shift register | HC |
| 74196 | 1 | presettable decade counter/latch | LS |
| 74197 | 1 | presettable binary counter/latch | LS |
| 74198 | 1 | 8-bit bidirectional universal shift register | Standard |
| 74199 | 1 | 8-bit bidirectional universal shift register with J-Not-K serial inputs | Standard |
| 74200 | 1 | 256-bit ram with three-state outputs | |
| 74201 | 1 | 256-bit (256×1) ram with three-state outputs | |
| 74206 | 1 | 256-bit ram with open collector outputs | |
| 74209 | 1 | 1024-bit (1024×1) ram with three-state output | |
| 74210 | 8 | octal buffer | |
| 74219 | 1 | 64-bit (16×4) RAM with noninverting three-state outputs | |
| 74221 | 2 | dual monostable multivibrator with Schmitt trigger input | HC/HCT |
| 74222 | 1 | 16 by 4 synchronous FIFO memory with three-state outputs | |
| 74224 | 1 | 16 by 4 synchronous FIFO memory with three-state outputs | |
| 74225 | 1 | asynchronous 16×5 FIFO memory | |
| 74226 | 1 | 4-bit parallel latched bus transceiver with three-state outputs | |
| 74227 | 1 | 64-bit fifo memories 16×4 | |
| 74228 | 1 | 64-bit fifo memories 16×4 open-collector outputs | |
| 74230 | 8 | octal buffer/driver with three-state outputs, true and complementary inputs | |
| 74231 | 8 | octal buffer and line driver with three-state outputs, G and /G complementary inputs | |
| 74232 | 4 | quad NOR Schmitt trigger | |
| 74237 | 1 | 3-of-8 decoder/demultiplexer with address latch, active high outputs | HC |
| 74238 | 1 | 3-of-8 decoder/demultiplexer, active high outputs | HC/HCT |
| 74239 | 2 | dual 2-of-4 decoder/demultiplexer, active high outputs | |
| 74240 | 8 | octal buffer with Inverted three-state outputs | HC/HCT |
| 74241 | 8 | octal buffer with noninverted three-state outputs | HC/HCT |
| 74242 | 4 | quad bus transceiver with inverted three-state outputs | |
| 74243 | 4 | quad bus transceiver with noninverted three-state outputs | HC |
| 74244 | 8 | octal buffer with noninverted three-state outputs | HC/HCT |
| 74245 | 8 | octal bus transceiver with noninverted three-state outputs | HC/HCT |
| 74246 | 1 | BCD to 7-segment decoder/driver with 30 V open collector outputs | LS |
| 74247 | 1 | BCD to 7-segment decoder/driver with 15 V open collector outputs | LS |
| 74248 | 1 | BCD to 7-segment decoder/driver with Internal Pull-up outputs | LS |
| 74249 | 1 | BCD to 7-segment decoder/driver with open collector outputs | |
| 74250 | 1 | 1 of 16 data selectors/multiplexers | |
| 74251 | 1 | 8-line to 1-line data selector/multiplexer with complementary three-state outputs | HC/HCT |
| 74253 | 2 | dual 4-line to 1-line data selector/multiplexer with three-state outputs | HC/HCT |
| 74255 | 2 | dual 4-bit addressable latch | |
| 74256 | 2 | dual 4-bit addressable latch | |
| 74257 | 4 | quad 2-line to 1-line data selector/multiplexer with noninverted three-state outputs | HC/HCT |
| 74258 | 4 | quad 2-line to 1-line data selector/multiplexer with Inverted three-state outputs | HC |
| 74259 | 1 | 8-bit addressable latch | HC/HCT |
| 74260 | 2 | dual 5-input NOR gate | |
| 74261 | 1 | 2-bit by 4-bit parallel binary multiplier | |
| 74264 | 1 | look ahead carry generator | |
| 74265 | 4 | quad complementary output elements | |
| 74266 | 4 | quad 2-input XNOR gate with open collector outputs | |
| 74268 | 6 | hex D-type latches three-state outputs, common output control, common enable | |
| 74270 | 1 | 2048-bit (512×4) read only memory with open collector outputs | |
| 74271 | 1 | 2048-bit (256×8) read only memory with open collector outputs | |
| 74273 | 1 | 8-bit register with asynchronous clear | HC/HCT |
| 74274 | 1 | 4-bit by 4-bit binary multiplier | |
| 74275 | 1 | 7-bit slice Wallace tree | |
| 74276 | 4 | quad J-Not-K edge-triggered flip-flops with separate clocks, common preset and clear | |
| 74278 | 1 | 4-bit cascadeable priority registers with latched data inputs | |
| 74279 | 4 | quad set-reset latch | |
| 74280 | 1 | 9-bit odd/even parity bit generator/checker | HC/HCT |
| 74281 | 1 | 4-bit parallel binary accumulator | |
| 74282 | 1 | look-ahead carry generator with selectable carry inputs | |
| 74283 | 1 | 4-bit binary full adder | HC |
| 74284 | 1 | 4-bit by 4-bit parallel binary multiplier (low order 4 bits of product) | |
| 74285 | 1 | 4-bit by 4-bit parallel binary multiplier (high order 4 bits of product) | |
| 74286 | 1 | 9-bit parity generator/checker with bus driver parity I/O port | |
| 74287 | 1 | 1024-bit (256×4) programmable read-only memory with three-state outputs | |
| 74288 | 1 | 256-bit (32×8) programmable read-only memory with three-state outputs | |
| 74289 | 1 | 64-bit (16×4) RAM with open collector outputs | |
| 74290 | 1 | decade counter (separate divide-by-2 and divide-by-5 sections) | |
| 74291 | 1 | 4-bit universal shift register, binary up/down counter, synchronous | |
| 74292 | 1 | programmable frequency divider/digital timer | |
| 74293 | 1 | 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) | |
| 74294 | 1 | programmable frequency divider/digital timer | |
| 74295 | 1 | 4-bit bidirectional register with three-state outputs | |
| 74297 | 1 | digital phase-locked loop filter | HC/HCT |
| 74298 | 4 | quad 2-input multiplexer with storage | |
| 74299 | 1 | 8-bit bidirectional universal shift/storage register with three-state outputs | HC/HCT |
| 74301 | 1 | 256-bit (256×1) random access memory with open collector output | |
| 74309 | 1 | 1024-bit (1024×1) random access memory with open collector output | |
| 74310 | 8 | octal buffer with Schmitt trigger inputs | |
| 74314 | 1 | 1024-bit random access memory | |
| 74319 | 1 | 64-bit random access memories 16×4 open collector outputs | |
| 74320 | 1 | crystal-controlled oscillator | |
| 74321 | 1 | crystal-controlled oscillators with F/2 and F/4 count-down outputs | |
| 74322 | 1 | 8-bit shift register with sign extend, three-state outputs | |
| 74323 | 1 | 8-bit bidirectional universal shift/storage register with three-state outputs | |
| 74324 | 1 | voltage-controlled oscillator (or crystal controlled) | |
| 74340 | 8 | octal buffer with Schmitt trigger inputs and three-state inverted outputs | |
| 74341 | 8 | octal buffer with Schmitt trigger inputs and three-state noninverted outputs | |
| 74344 | 8 | octal buffer with Schmitt trigger inputs and three-state noninverted outputs | |
| 74347 | 1 | BCD-to-7 segment decoders/drivers open collector outputs, low voltage version of 7447 | |
| 74348 | 1 | 8 to 3-line priority encoder with three-state outputs | |
| 74350 | 1 | 4-bit shifter with three-state outputs | |
| 74351 | 2 | dual 8-line to 1-line data selectors/multiplexers with three-state outputs and 4 common data inputs | |
| 74352 | 2 | dual 4-line to 1-line data selectors/multiplexers with inverting outputs | |
| 74353 | 2 | dual 4-line to 1-line data selectors/multiplexers with inverting three-state outputs | |
| 74354 | 1 | 8 to 1-line data selector/multiplexer with transparent latch, three-state outputs | |
| 74355 | 1 | 8-line to 1-line data selector/multiplexer with transparent registers, open-collector outputs | |
| 74356 | 1 | 8 to 1-line data selector/multiplexer with edge-triggered register, three-state outputs | |
| 74357 | 1 | 8-line to 1-line data selectors/multiplexers/edge-triggered registers, open-collector outputs | |
| 74361 | 1 | bubble memory function timing generator | |
| 74362 | 1 | four-phase clock generator/driver | |
| 74363 | 8 | octal three-state D-latches | |
| 74365 | 6 | hex buffer with noninverted three-state outputs | HC/HCT |
| 74366 | 6 | hex buffer with inverted three-state outputs | HC/HCT |
| 74367 | 6 | hex buffer with noninverted three-state outputs | HC/HCT |
| 74368 | 6 | hex buffer with Inverted three-state outputs | HC/HCT |
| 74370 | 1 | 2048-bit (512×4) read-only memory with three-state outputs | |
| 74371 | 1 | 2048-bit (256×8) read-only memory with three-state outputs | |
| 74373 | 8 | octal transparent latch with three-state outputs | HC/HCT |
| 741G373 | 1 | single transparent latch with three-state output | |
| 74374 | 8 | octal register with three-state outputs | HC/HCT |
| 741G374 | 1 | single D-type flip-flop with three-state output | |
| 74375 | 4 | quad bistable latch | |
| 74376 | 4 | quad J-Not-K flip-flop with common clock and common clear | |
| 74377 | 1 | 8-bit register with clock enable | HC/HCT |
| 74378 | 1 | 6-bit register with clock enable | |
| 74379 | 1 | 4-bit register with clock enable and complementary outputs | |
| 74380 | 1 | 8-bit multifunction register | |
| 74381 | 1 | 4-bit arithmetic logic unit/function generator with generate and propagate outputs | |
| 74382 | 1 | 4-bit arithmetic logic unit/function generator with ripple carry and overflow outputs | |
| 74384 | 1 | 8-bit by 1-bit two’s complement multipliers | |
| 74385 | 4 | quad 4-bit adder/subtractor | |
| 74386 | 4 | quad 2-input XOR gate | |
| 74387 | 1 | 1024-bit (256×4) programmable read-only memory with open collector outputs | |
| 74388 | 1 | 4-bit register with standard and three-state outputs | |
| 74390 | 2 | dual 4-bit decade counter | HC/HCT |
| 74393 | 2 | dual 4-bit binary counter | HC/HCT |
| 74395 | 1 | 4-bit universal shift register with three-state outputs | |
| 74396 | 8 | octal storage registers, parallel access | |
| 74398 | 4 | quad 2-input multiplexers with storage and complementary outputs | |
| 74399 | 4 | quad 2-input multiplexer with storage | |
| 74405 | 1 | 1 to 8 decoder, equivalent to Intel 8205, only found as UCY74S405 so might be non-TI number | |
| 74408 | 1 | 8-bit parity tree | |
| 74412 | 1 | multi-mode buffered 8-bit latches with three-state outputs and clear | |
| 74422 | 1 | re-triggerable mono-stable multivibrators, two inputs | |
| 74423 | 2 | dual retriggerable monostable multivibrator | HC/HCT |
| 74424 | 1 | two-phase clock generator/driver | |
| 74425 | 4 | quad bus buffers with three-state outputs and active low enables | |
| 74426 | 4 | quad bus buffers with three-state outputs and active high enables | |
| 74428 | 1 | system controller for 8080a | |
| 74436 | 1 | line driver/memory driver circuits – mos memory interface, damping output resistor | |
| 74437 | 1 | line driver/memory driver circuits – mos memory interface | |
| 74438 | 1 | system controller for 8080a | |
| 74440 | 4 | quad tridirectional bus transceiver with noninverted open collector outputs | |
| 74441 | 4 | quad tridirectional bus transceiver with Inverted open collector outputs | |
| 74442 | 4 | quad tridirectional bus transceiver with noninverted three-state outputs | |
| 74443 | 4 | quad tridirectional bus transceiver with Inverted three-state outputs | |
| 74444 | 4 | quad tridirectional bus transceiver with Inverted and noninverted three-state outputs | |
| 74445 | 1 | BCD-to-decimal decoders/drivers | |
| 74446 | 4 | quad bus transceivers with direction controls | |
| 74447 | 1 | BCD-to-7-segment decoders/drivers, low voltage version of 74247 | |
| 74448 | 4 | quad tridirectional bus transceiver with inverted and noninverted open collector outputs | |
| 74449 | 4 | quad bus transceivers with direction controls, true outputs | |
| 74450 | 1 | 16-to-1 multiplexer with complementary outputs | |
| 74451 | 2 | dual 8-to-1 multiplexer | |
| 74452 | 2 | dual decade counter, synchronous | |
| 74453 | 2 | dual binary counter, synchronous | |
| 74453 | 4 | quad 4-to-1 multiplexer | |
| 74454 | 2 | dual decade up/down counter, synchronous, preset input | |
| 74455 | 2 | dual binary up/down counter, synchronous, preset input | |
| 74456 | 1 | NBCD (Natural binary coded decimal) adder | |
| 74460 | 1 | bus transfer switch | |
| 74461 | 1 | 8-bit presettable binary counter with three-state outputs | |
| 74462 | 1 | fiber-optic link transmitter | |
| 74463 | 1 | fiber-optic link receiver | |
| 74465 | 8 | octal buffer with three-state true outputs | |
| 74466 | 8 | octal buffers with three-state inverted outputs | |
| 74467 | 8 | octal buffers with three-state true outputs | |
| 74468 | 8 | octal buffers with three-state inverted outputs | |
| 74469 | 1 | 8-bit synchronous up/down counter with parallel load and hold capability | |
| 74470 | 1 | 2048-bit (256×8) programmable read-only memory with open collector outputs | |
| 74471 | 1 | 2048-bit (256×8) programmable read-only memory with three-state outputs | |
| 74472 | 1 | programmable read-only memory with open collector outputs | |
| 74473 | 1 | programmable read-only memory with three-state outputs | |
| 74474 | 1 | programmable read-only memory with open collector outputs | |
| 74475 | 1 | programmable read-only memory with three-state outputs | |
| 74481 | 1 | 4-bit slice cascadable processor elements | |
| 74482 | 1 | 4-bit slice expandable control elements | |
| 74484 | 1 | BCD-to-binary converter | |
| 74485 | 1 | binary-to-BCD converter | |
| 74490 | 2 | dual decade counter | |
| 74491 | 1 | 10-bit binary up/down counter with limited preset and three-state outputs | |
| 74498 | 1 | 8-bit bidirectional shift register with parallel inputs and three-state outputs | |
| 74508 | 1 | 8-bit multiplier/divider | |
| 74518 | 1 | 8-bit comparator with open collector output, input pull-up resistor | |
| 74519 | 1 | 8-bit comparator with open collector output | |
| 74520 | 1 | 8-bit comparator with inverted totem-pole output, input pull-up resistor | |
| 74521 | 1 | 8-bit comparator with inverted totem-pole output | |
| 74522 | 1 | 8-bit comparator with inverted open-collector output, input pull-up resistor | |
| 74524 | 1 | 8-bit registered comparator | |
| 74526 | 1 | fuse programmable identity comparator, 16-bit | |
| 74527 | 1 | fuse programmable identity comparator, 8-bit + 4-bit conventional Identity comparator | |
| 74528 | 1 | fuse programmable Identity comparator, 12-bit | |
| 74531 | 8 | octal transparent latch with 32 ma three-state outputs | |
| 74532 | 8 | octal register with 32 ma three-state outputs | |
| 74533 | 1 | octal transparent latch with inverting three-state outputs | |
| 74534 | 1 | octal register with inverting three-state outputs | HCT |
| 74535 | 1 | octal transparent latch with inverting three-state outputs | |
| 74536 | 1 | octal register with inverting 32 ma three-state outputs | |
| 74537 | 1 | BCD to decimal decoder with three-state outputs | |
| 74538 | 1 | 1 of 8 decoder with three-state outputs | |
| 74539 | 2 | dual 1 of 4 decoder with three-state outputs | |
| 74540 | 1 | inverting octal buffer with three-state outputs | HC/HCT |
| 74541 | 1 | non-inverting octal buffer with three-state outputs | HC/HCT |
| 74544 | 1 | non-inverting octal registered transceiver with three-state outputs | |
| 74558 | 1 | 8-bit by 8-bit multiplier with three-state outputs | |
| 74560 | 1 | 4-bit decade counter with three-state outputs | |
| 74561 | 1 | 4-bit binary counter with three-state outputs | |
| 74563 | 1 | 8-bit D-type transparent latch with inverting three-state outputs | HC/HCT |
| 74564 | 1 | 8-bit D-type edge-triggered register with inverting three-state outputs | HC |
| 74568 | 1 | decade up/down counter with three-state outputs | |
| 74569 | 1 | binary up/down counter with three-state outputs | |
| 74573 | 1 | octal D-type transparent latch with three-state outputs | HC/HCT |
| 74574 | 1 | octal D-type edge-triggered flip-flop with three-state outputs | HC/HCT |
| 74575 | 1 | octal D-type flip-flop with synchronous clear, three-state outputs | |
| 74576 | 1 | octal D-type flip-flop with inverting three-state outputs | |
| 74577 | 1 | octal D-type flip-flop with synchronous clear, inverting three-state outputs | |
| 74580 | 1 | octal transceiver/latch with inverting three-state outputs | |
| 74589 | 1 | 8-bit shift register with input latch, three-state outputs | |
| 74590 | 1 | 8-bit binary counter with output registers and three-state outputs | HC |
| 74591 | 1 | 8-bit binary counters with output registers, open-collector outputs | |
| 74592 | 1 | 8-bit binary counter with input registers | |
| 74593 | 1 | 8-bit binary counter with input registers and three-state outputs | |
| 74594 | 1 | 8-bit shift registers with output latches | HC/HCT |
| 74595 | 1 | 8-bit shift registers with output latches, three-state parallel outputs | HC/HCT |
| 74596 | 1 | 8-bit shift registers with output latches, open-collector parallel outputs | |
| 74597 | 1 | 8-bit shift registers with input latches | HC/HCT |
| 74598 | 1 | 8-bit shift register with input latches | |
| 74599 | 1 | 8-bit shift registers with output latches, open-collector outputs | |
| 74600 | 1 | dynamic memory refresh controller, transparent and burst modes, for 4K or 16K drams | |
| 74601 | 1 | dynamic memory refresh controller, transparent and burst modes, for 64K drams | |
| 74602 | 1 | dynamic memory refresh controller, cycle steal and burst modes, for 4K or 16K drams | |
| 74603 | 1 | dynamic memory refresh controller, cycle steal and burst modes, for 64K drams | |
| 74604 | 1 | octal 2-input multiplexer with latch, high-speed, with three-state outputs | |
| 74605 | 1 | latch, high-speed, with open collector outputs | |
| 74606 | 1 | octal 2-input multiplexer with latch, glitch-free, with three-state outputs | |
| 74607 | 1 | octal 2-input multiplexer with latch, glitch-free, with open collector outputs | |
| 74608 | 1 | memory cycle controller | |
| 74610 | 1 | memory mapper, latched, three-state outputs | |
| 74611 | 1 | memory mapper, latched, open collector outputs | |
| 74612 | 1 | memory mapper, three-state outputs | |
| 74613 | 1 | memory mapper, open collector outputs | |
| 74618 | 1 | Schmitt trigger positive-nand gates with totem-pole outputs | |
| 74619 | 1 | Schmitt trigger inverters with totem-pole outputs | |
| 74620 | 1 | octal bus transceiver, inverting, three-state outputs | |
| 74621 | 1 | octal bus transceiver, noninverting, open collector outputs | |
| 74622 | 1 | octal bus transceiver, inverting, open collector outputs | |
| 74623 | 1 | octal bus transceiver, noninverting, three-state outputs | |
| 74624 | 1 | voltage-controlled oscillator with enable control, range control, two-phase outputs | |
| 74625 | 2 | dual voltage-controlled oscillator with two-phase outputs | |
| 74626 | 2 | dual voltage-controlled oscillator with enable control, two-phase outputs | |
| 74627 | 2 | dual voltage-controlled oscillator | |
| 74628 | 1 | voltage-controlled oscillator with enable control, range control, external temperature compensation, and two-phase outputs | |
| 74629 | 2 | dual voltage-controlled oscillator with enable control, range control | |
| 74630 | 1 | 16-bit error detection and correction (EDAC) with three-state outputs | |
| 74631 | 1 | 16-bit error detection and correction with open collector outputs | |
| 74632 | 1 | 32-bit parallel error detection and correction, three-state outputs, byte-write | |
| 74633 | 1 | 32-bit parallel error detection and correction, open-collector outputs, byte-write | |
| 74634 | 1 | 32-bit parallel error detection and correction, three-state outputs | |
| 74635 | 1 | 32-bit parallel error detection and correction, open-collector outputs | |
| 74638 | 1 | octal bus transceiver with inverting three-state outputs | |
| 74639 | 1 | octal bus transceiver with noninverting three-state outputs | |
| 74640 | 1 | octal bus transceiver with inverting three-state outputs | HC/HCT |
| 74641 | 1 | octal bus transceiver with noninverting open collector outputs | |
| 74642 | 1 | octal bus transceiver with inverting open collector outputs | |
| 74643 | 1 | octal bus transceiver with mix of inverting and noninverting three-state outputs | |
| 74644 | 1 | octal bus transceiver with mix of inverting and noninverting open collector outputs | |
| 74645 | 1 | octal bus transceiver | |
| 74646 | 1 | octal bus transceiver/latch/multiplexer with noninverting three-state outputs | |
| 74647 | 1 | octal bus transceiver/latch/multiplexer with noninverting open collector outputs | |
| 74648 | 1 | octal bus transceiver/latch/multiplexer with inverting three-state outputs | |
| 74649 | 1 | octal bus transceiver/latch/multiplexer with inverting open collector outputs | |
| 74651 | 1 | octal bus transceiver/register with inverting three-state outputs | |
| 74652 | 1 | octal bus transceiver/register with noninverting three-state outputs | HC/HCT |
| 74653 | 1 | octal bus transceiver/register with inverting three-state and open collector outputs | |
| 74654 | 1 | octal bus transceiver/register with noninverting three-state and open collector outputs | |
| 74658 | 1 | octal bus transceiver with parity, inverting | |
| 74659 | 1 | octal bus transceiver with parity, noninverting | |
| 74664 | 1 | octal bus transceiver with parity, inverting | |
| 74665 | 1 | octal bus transceiver with parity, noninverting | |
| 74668 | 1 | synchronous 4-bit decade up/down counter | |
| 74669 | 1 | synchronous 4-bit binary up/down counter | |
| 74670 | 1 | 4 by 4 register file with three-state outputs | HC/HCT |
| 74671 | 1 | 4-bit bidirectional shift register/latch/multiplexer with three-state outputs | |
| 74672 | 1 | 4-bit bidirectional shift register/latch/multiplexer with three-state outputs | |
| 74673 | 1 | 16-bit serial-in serial-out shift register with output storage registers, three-state outputs | |
| 74674 | 1 | 16-bit parallel-in serial-out shift register with three-state outputs | |
| 74676 | 1 | 16-bit serial/parallel-in serial-out shift register | |
| 74677 | 1 | 16-bit address comparator with enable | |
| 74678 | 1 | 16-bit address comparator with latch | |
| 74679 | 1 | 12-bit address comparator with latch | |
| 74680 | 1 | 12-bit address comparator with enable | |
| 74681 | 1 | 4-bit parallel binary accumulator | |
| 74682 | 1 | 8-bit magnitude comparator | |
| 74683 | 1 | 8-bit magnitude comparator with open collector outputs | |
| 74684 | 1 | 8-bit magnitude comparator | |
| 74685 | 1 | 8-bit magnitude comparator with open collector outputs | |
| 74686 | 1 | 8-bit magnitude comparator with enable | |
| 74687 | 1 | 8-bit magnitude comparator with enable | |
| 74688 | 1 | 8-bit equality comparator | HC/HCT |
| 74689 | 1 | 8-bit magnitude comparator with open collector outputs | |
| 74690 | 1 | 4-bit decimal counter/latch/multiplexer with asynchronous clear, three-state outputs | |
| 74691 | 1 | 4-bit binary counter/latch/multiplexer with asynchronous clear, three-state outputs | |
| 74692 | 1 | 4-bit decimal counter/latch/multiplexer with synchronous clear, three-state outputs | |
| 74693 | 1 | 4-bit binary counter/latch/multiplexer with synchronous clear, three-state outputs | |
| 74694 | 1 | 4-bit decimal counter/latch/multiplexer with synchronous and asynchronous clears, three-state outputs | |
| 74695 | 1 | 4-bit binary counter/latch/multiplexer with synchronous and asynchronous clears, three-state outputs | |
| 74696 | 1 | 4-bit decimal counter/register/multiplexer with asynchronous clear, three-state outputs | |
| 74697 | 1 | 4-bit binary counter/register/multiplexer with asynchronous clear, three-state outputs | |
| 74698 | 1 | 4-bit decimal counter/register/multiplexer with synchronous clear, three-state outputs | |
| 74699 | 1 | 4-bit binary counter/register/multiplexer with synchronous clear, three-state outputs | |
| 74716 | 1 | programmable decade counter | |
| 74718 | 1 | programmable binary counter | |
| 74724 | 1 | voltage-controlled multivibrator | |
| 74740 | 1 | octal buffer/Line driver, inverting, three-state outputs | |
| 74741 | 1 | octal buffer/line driver, noninverting, three-state outputs, mixed enable polarity | |
| 74744 | 1 | octal buffer/line driver, noninverting, three-state outputs | |
| 74748 | 1 | 8 to 3-line priority encoder | |
| 74779 | 1 | 8-bit bidirectional binary counter (three-state) | |
| 74783 | 1 | synchronous address multiplexer | |
| 74790 | 1 | error detection and correction (EDAC) | |
| 74794 | 1 | 8-bit register with readback | |
| 74795 | 1 | octal buffer with three-state outputs | |
| 74796 | 1 | octal buffer with three-state outputs | |
| 74797 | 1 | octal buffer with three-state outputs | |
| 74798 | 1 | octal buffer with three-state outputs | |
| 74804 | 6 | hex 2-input NAND drivers | |
| 74805 | 6 | hex 2-input NOR drivers | |
| 74808 | 6 | hex 2-input AND drivers | |
| 74822 | 1 | 10-bit bus interface flip-flop with three-state outputs | |
| 74825 | 1 | 8-bit D-type flip-flop | |
| 74832 | 6 | hex 2-input OR drivers | |
| 74848 | 1 | 8 to 3-line priority encoder with three-state outputs | |
| 74857 | 6 | hex 2-line to 1-line multiplexer with three-state outputs | |
| 74869 | 1 | synchronous 8-bit up/down counter | |
| 74873 | 1 | octal transparent latch | |
| 74874 | 1 | octal D-type flip-flop | |
| 74876 | 1 | octal D-type flip-flop with inverting outputs | |
| 74878 | 2 | dual 4-bit D-type flip-flop with synchronous clear, noninverting three-state outputs | |
| 74879 | 2 | dual 4-bit D-type flip-flop with synchronous clear, inverting three-state outputs | |
| 74880 | 1 | octal transparent latch with inverting outputs | |
| 74881 | 1 | arithmetic logic unit | |
| 74882 | 1 | 32-bit lookahead carry generator | |
| 74888 | 1 | 8-bit slice processor | |
| 74901 | 6 | hex inverting TTL buffer | |
| 74902 | 6 | hex non-inverting TTL buffer | |
| 74903 | 6 | hex inverting CMOS buffer | |
| 74904 | 6 | hex non-inverting CMOS buffer | |
| 74905 | 1 | 12-bit successive approximation register | |
| 74906 | 6 | hex open drain n-channel buffers | |
| 74907 | 6 | hex open drain p-channel buffers | |
| 74908 | 2 | dual CMOS 30 V relay driver | |
| 74909 | 4 | quad voltage comparator | |
| 74910 | 1 | 256×1 CMOS static RAM | |
| 74911 | 1 | 4-digit expandable display controller | |
| 74912 | 1 | 6-digit BCD display controller and driver | C |
| 74914 | 6 | hex Schmitt trigger with extended input voltage | C |
| 74915 | 1 | 7-segment to BCD decoder | |
| 74917 | 1 | 6-digit hex display controller and driver | C |
| 74918 | 2 | dual CMOS 30 V relay driver | |
| 74920 | 1 | 256×4 CMOS static RAM | |
| 74921 | 1 | 256×4 CMOS static RAM | |
| 74922 | 1 | 16-key encoder | |
| 74923 | 1 | 20-key encoder | |
| 74925 | 1 | 4-digit counter/display driver | C |
| 74926 | 1 | 4-digit decade counter/display driver with carry out and latch (up to 9999) | C |
| 74927 | 1 | 4-digit timer counter/display driver (up to 9599, intended as time elapsed) | C |
| 74928 | 1 | 4-digit counter/display driver (up to 1999) | C |
| 74929 | 1 | 1024×1 CMOS static RAM | |
| 74930 | 1 | 1024×1 CMOS static RAM | |
| 74932 | 1 | phase comparator | |
| 74933 | 1 | address bus comparator | |
| 74934 | 1 | =ADC0829 ADC, see corresponding NSC datasheet | |
| 74935 | 1 | 3.5-digit digital voltmeter (DVM) support chip for multiplexed 7-segment displays | |
| 74936 | 1 | 3.75-digit digital voltmeter (DVM) support chip for multiplexed 7-segment displays | |
| 74937 | 1 | =ADC3511 ADC, see corresponding NSC datasheet | |
| 74938 | 1 | =ADC3711 ADC, see corresponding NSC datasheet | |
| 74941 | 1 | octal bus/line drivers/line receivers | |
| 74945 | 1 | 4-digit up/down counter with decoder and driver | |
| 74947 | 1 | 4-digit up/down counter with decoder and driver | |
| 74948 | 1 | =ADC0816 ADC, see corresponding NSC datasheet | |
| 74949 | 1 | =ADC0808 ADC, see corresponding NSC datasheet | |
| 74962 | 1 | Dual Rank 8-Bit TRI-STATE Shift Register | C |
| 741005 | 6 | hex inverting buffer with open-collector output | |
| 741035 | 6 | hex noninverting buffers with open-collector outputs | |
| 742960 | 1 | error detection and correction (EDAC) | |
| 742961 | 1 | edac bus buffer, inverting | |
| 742962 | 1 | edac bus buffer, noninverting | |
| 742968 | 1 | dynamic memory controller | |
| 742969 | 1 | memory timing controller for use with EDAC | |
| 742970 | 1 | memory timing controller for use without EDAC | |
| 741G3208 | 1 | single 3-input OR-AND gate; | |
| 744002 | 2 | dual 4-input NOR gate | HC/HCT |
| 744015 | 2 | dual 4-bit shift registers | HC/HCT |
| 744016 | 4 | quad bilateral switch | HC/HCT |
| 744017 | 1 | 5-stage ÷10 Johnson counter | HC/HCT |
| 744020 | 1 | 14-stage binary counter | HC/HCT |
| 744024 | 1 | 7-stage ripple carry binary counter | HC |
| 744028 | 1 | BCD to decimal decoder | |
| 744040 | 1 | 12-stage binary ripple counter | HC/HCT |
| 744046 | 1 | phase-locked loop and voltage-controlled oscillator | HC/HCT |
| 744049 | 6 | hex inverting buffer | HC |
| 744050 | 6 | hex buffer/converter (non-inverting) | HC |
| 744051 | 1 | high-speed CMOS 8-channel analog multiplexer/demultiplexer | HC/HCT |
| 744052 | 2 | dual 4-channel analog multiplexer/demultiplexers | HC/HCT |
| 744053 | 3 | triple 2-channel analog multiplexer/demultiplexers | HC/HCT |
| 744059 | 1 | programmable divide-by-N counter | HC/HCT |
| 744060 | 1 | 14-stage binary ripple counter with oscillator | HC/HCT |
| 744066 | 4 | quad bilateral switches | HC/HCT |
| 744067 | 1 | 16-channel analog multiplexer/demultiplexer | HC/HCT |
| 744075 | 3 | triple 3-input OR gate | HC/HCT |
| 744078 | 1 | 8-input OR/NOR gate | HC |
| 744094 | 1 | 8-bit three-state shift register/latch | HC/HCT |
| 744316 | 4 | quad analog switch | HC/HCT |
| 744351 | 1 | 8-channel analog multiplexer/demultiplexer with latch | HC/HCT |
| 744353 | 3 | triple 2-channel analog multiplexer/demultiplexer with latch | HC/HCT |
| 744511 | 1 | BCD to 7-segment decoder | HC/HCT |
| 744514 | 1 | 4-to-16 line decoder/demultiplexer with input latches | HC/HCT |
| 744518 | 2 | dual 4-bit synchronous decade counter | HC |
| 744520 | 2 | dual 4-bit synchronous binary counter | HC/HCT |
| 744538 | 2 | dual retriggerable precision monostable multivibrator | HC/HCT |
| 747007 | 6 | hex buffer | |
| 747014 | 6 | hex Schmitt trigger non-inverting buffer | HC |
| 747046 | 1 | phase-locked loop with voltage-controlled oscillator and lock detector | HC/HCT |
| 747266 | 4 | quad 2-input XNOR gate | HC |
| 7411244 | 8 | octal buffer/driver with three-state outputs | AC |
| 7429841 | 1 | 10-bit bus-interface D-type latch with three-state outputs | |
| 7440103 | 1 | presettable 8-bit synchronous down counter | HC |
| 7440105 | 1 | 4-bit by 16-word FIFO register | HC/HCT |
from wikipedia